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 WM8733 102dB Stereo DAC
Product Preview, July 2000, Rev 1.3
DESCRIPTION
WM8733 is a high performance stereo DAC designed for use in portable audio equipment, video CD players and similar applications. It comprises selectable normal or I2S compatible serial data interfaces for 16 to 24-bit inputs, high performance digital filters, and sigma-delta output DACs, achieving an 102dB signal-to-noise ratio. The device is available in a 14-pin SOIC package that offers selectable mute and de-emphasis functions using a minimum of external components. Low supply voltage operation and low current consumption are valuable features, particularly for use in portable equipment. Additional modes consist of a powerdown option and the possibility of generating separate differential left and right outputs for applications demanding higher performance.
FEATURES
* * * * * * * * * * * High tolerance to clock jitter Compatible with PCM1733 Distortion > 90dB, SNR > 102dB, dynamic range performance > 100dB Stereo DAC with input sampling from 8kHz to 96kHz Additional mute feature and high performance differential modes Normal or I2S compatible data format Sigma-delta design with 64x oversampling System clock 256fs or 384fs or 512fs Supply range 3V to 5V Analogue voltage output to drive 2k load 14-pin SOIC package
APPLICATIONS
* High performance consumer audio
BLOCK DIAGRAM
SEL[0] SEL[1] MODE 0 0 Normal stereo 0 1 Power down 1 0 Left only differential output 1 1 Right only differential output
SEL[0] (4) SEL[1] (11) FORMAT (13) SCKI (14) LRCIN (1) DIN (2) BCKIN (3)
WM8733
SWITCHED CAPACITOR DAC
DIGITAL SIGMA-DELTA MODULATOR SERIAL INTERFACE DIGITAL FILTERS DIGITAL SIGMA-DELTA MODULATOR
(6) VOUTR
SWITCHED CAPACITOR DAC
(9) VOUTL
INFINITE ZERO DETECT
10k Wired OR (12) (10) DEEMPH MUTE DIGITAL VDD DIGITAL GND
(8) VDD
(5) CAP
(7) GND
WOLFSON MICROELECTRONICS LTD.
Lutton Court, Bernard Terrace, Edinburgh, EH8 9NX, UK Tel: +44 (0) 131 667 9386 Fax: +44 (0) 131 667 5176 Email: sales@wolfson.co.uk http://www.wolfson.co.uk
Product Preview data sheets contain specifications for products in the formative phase of development. These products may be changed or discontinued without notice.
2000 Wolfson Microelectronics Ltd.
WM8733 PIN CONFIGURATION
LRCIN DIN BCKIN SEL0 CAP VOUTR GND 1 2 3 4 5 6 7 14 13 SCKI FORMAT DEEMPH SEL1 MUTE VOUTL VDD
Product Preview
ORDERING INFORMATION
DEVICE TEMP. RANGE PACKAGE
o
XWM8733ED
-25 to +85 C
14-pin SOIC
WM8733
12 11 10 9 8
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device.
CONDITION Supply voltage Reference input Operating temperature range, TA Storage temperature Lead temperature (soldering, 10 seconds) Lead temperature (soldering, 2 minutes)
MIN -0.3V
o o
MAX +7.0V VDD+0.3V
o
-25 C -65 C
+85 C +150 C +260 C +183 C
o o o
RECOMMENDED OPERATING CONDITIONS
PARAMETER Supply range Ground Supply current SYMBOL VDD GND VDD = 5V TEST CONDITIONS MIN -10% TYP 3.0 to 5.0 0 15 MAX +10% UNIT V V mA
WOLFSON MICROELECTRONICS LTD
PP Rev 1.3 July 2000
2
Product Preview
WM8733
ELECTRICAL CHARACTERISTICS
Test Characteristics VDD = 5V, GND = 0V, TA = +25oC, fs = 44.1kHz, SCKI = 384fs unless otherwise stated. PARAMETER Digital Logic Levels Input LOW level Input HIGH level Analogue Output Levels Output level Into 10kohm, full scale 0dB, (5V supply) Into 10kohm, full scale 0dB, (3V supply) o midrail or AC coupled (5V supply) o midrail or AC coupled (3V supply) 5V or 3V 1 0.6 2 10 10 100 VDD/2 VDD to CAP and CAP to GND 80 100 VDD/2 Stereo mode Mono mode Stereo mode Mono mode THD (full scale) THD+N Frequency response Pass band ripple Transition band Out of band rejection Dynamic Range Stereo mode Mono mode 90 1 5 20,000 -40 100 0dB -60dB -35 0 0.25 0.03 -40 20,000 0.01 VDD = 3V 96 100 VDD = 5V 98 102 dB dB dB dB % dB Hz dB Hz dB dB dB dB %FSR 120 VRMS VRMS kohms kohms pF V kohms VIL VIH 2.0 0.8 V V SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
Minimum resistance load Maximum capacitance load Output DC level Reference Levels Potential divider resistance Voltage at CAP DAC Circuit Specifications SNR (Note 1)
Channel Separation Gain mismatch channel-to-channel Audio Data Input and System Clock Timing Information BCKIN pulse cycle time BCKIN pulse width high BCKIN pulse width low BCKIN rising edge to LRCIN edge LRCIN rising edge to BCKIN rising edge DIN setup time DIN hold time System clock pulse width high System clock pulse width low Note 1 Note 2 tBCY tBCH tBCL tBL tLB tDS tDH tSCKIH tSCKIL 100 50 50 30 30 30 30 13 13
ns ns ns ns ns ns ns ns ns
Ratio of RMS output level with 1kHz full scale input, to the RMS output level with all zeros into the digital input, measured "A" weighted over a 20Hz to 20kHz bandwidth. All performance measurements done with 20kHz low pass filter. Failure to use such a filter will result in higher THD+N and lower SNR and Dynamic Range readings than are found in the Electrical Characteristics. The low pass filter removes out of band noise; although it is not audible it may affect dynamic specification values.
WOLFSON MICROELECTRONICS LTD
PP Rev 1.3 July 2000
3
WM8733 PIN DESCRIPTION
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 NAME LRCIN DIN BCKIN SEL0 CAP VOUTR GND VDD VOUTL MUTE SEL1 DEEMPH FORMAT SCKI TYPE Digital input Digital input Digital input Digital input Analogue output Analogue output Supply Supply Analogue output Digital input Digital input Digital input Digital input Digital input Sample rate clock input Serial data input Bit clock input Mode select (internal pull-down) Analogue internal reference Right channel DAC output 0V supply Positive supply Left channel DAC output Soft mute control; high = muted, Z = auto mute input/output Mode select (internal pull-down) DESCRIPTION
Product Preview
De-emphasis select; high = de-emphasis ON (44.1kHz only), (internal pull-up) Data input format select; `lo' = normal, `hi' = I2S (internal pull-up) System clock input (256fs or 384fs or 512fs)
WOLFSON MICROELECTRONICS LTD
PP Rev 1.3 July 2000
4
Product Preview
WM8733
DEVICE DESCRIPTION
INTRODUCTION
WM8733 is a complete high performance stereo audio 18-bit digital-to-analogue converter, including digital interpolation filter, multibit sigma-delta with dither, and switched capacitor multibit stereo DAC and output smoothing filters. Special functions of soft mute and de-emphasis are provided, and operation using system clock of 256fs, or 384fs or 512fs is provided, selection between either clock rate being automatically controlled. Sample rates (fs) from less than 8ks/s to 96ks/s are allowed, provided the appropriate system clock is input. An auto mute function is provided which is enabled if MUTE (pin 10) is left at high impedance. If 64 successive left and right channel data samples of value 0 are received, auto mute is achieved. This signal is wire ORed to MUTE (pin 10) via 10K resistor. If MUTE (pin 10) internally is not externally driven, the internal auto mute state is visible on this pin as a weak drive strength signal (10k source). MUTE 0 Z 1 Table 1 Soft Mute Control A novel multi bit sigma-delta DAC design is used, utilising a 64x oversampling rate, to optimise signal to noise performance and offer increased clock jitter tolerance. Internally generated midrail references are used to DC bias output signals, requiring only a single external capacitor for decoupling purposes. The device is packaged in a small 14-pin SOIC package, offering pin compatibility with Burr Brown PCM1733, but with added functionality of a soft mute input pin, which may be left floating to enable auto mute detection, or held `low' leaving the device operational. Single 3V to 5V supplies may be used, the output amplitude scaling with absolute supply level. Low supply voltage operation and low current consumption, and the low pin count small package, make the WM8733 attractive for many consumer type applications. DESCRIPTION Soft mute is OFF Auto mute is enabled Soft mute is ON
WOLFSON MICROELECTRONICS LTD
PP Rev 1.3 July 2000
5
WM8733
DAC CIRCUITS
Product Preview
The WM8733 DACs are designed to allow playback of 18-bit PCM audio or similar data with high resolution and low noise and distortion. Sample rates up to 96ks/s may be used, with much lower sample rates acceptable provided that the ratio of sample rate (LRCIN) to system clock is maintained at the required 256fs, or 384fs or 512fs times. The DACs on WM8733 are implemented using sigma-delta oversampled conversion techniques. These require that the PCM samples are digitally filtered and interpolated to generate a set of samples at a much higher rate than the input rate. This sample stream is then digitally modulated to generate a digital pulse stream that is then converted to analogue signals in a switched capacitor DAC. The advantage of this technique is that the DAC is linearised using noise shaping techniques, allowing the 16-bit resolution to be met using non-critical analogue components. A further advantage is that the high sample rate at the DAC output means that smoothing filters on the output of the DAC need only have fairly crude characteristics in order to remove the characteristic steps, or images, on the output of the DAC. In order to ensure that generation of tones characteristic to sigma-delta convertors is not a problem, dithering is used in the digital modulator, and a higher order modulator is used. The switched capacitor technique used in the DAC reduces sensitivity to clock jitter compared to switched current techniques used in other implementations. De-emphasis of 44.1kHz signals may be applied if required. DEEMPH 0 1 Table 2 De-emphasis Control The voltage on the CAP pin is used as the reference for the DACs, therefore the amplitude of the signals at the DAC outputs will scale with the amplitude of the voltage at the CAP. An external reference could be used to drive in on the CAP pin if desired, but a value typically of about midrail should be used for optimum performance. The outputs of the 2 DACs are buffered out of the device by buffer amplifiers. These amplifiers will source load current of several mA and sink current up to 1.5mA, so allowing significant loads to be driven. The output source is active, the sink is Class A, i.e. fixed value, so greater loads might be driven if an external `pull-down' resistor is connected at the output. Typically an external low pass filter circuit will be used to remove residual sampling noise of the 64x oversampling used and if desired adjust the signal amplitude and device strength. DESCRIPTION De-emphasis is OFF De-emphasis is ON (44.1kHz only)
WOLFSON MICROELECTRONICS LTD
PP Rev 1.3 July 2000
6
Product Preview
WM8733
WM8733 has serial interface formats that are fully compatible with both normal (MSB first, rightjustified) and I2S interfaces. The data format is selected with the FORMAT pin. When FORMAT is LOW, normal data format is selected. When the format is HIGH, I2S format is selected. If the application demands 16-bit or 20-bit data, then I2S format may be used. Two LSBs will be lost in 20-bit mode. Normal mode will support 18-bit data applications or 16-bit packed mode applications (automatically detected). Note: In 16-bit "packed" mode operation (exactly 32 BLCKS per LRCIN period) the data word must align exactly with LRCIN clock edges (effectively both left and right justified at the same time). FORMAT 0 1 DESCRIPTION Normal format (MSB-first, right justified) I2S format (Philips serial data protocol)
SERIAL DATA INTERFACE
Table 3 Serial Interface Formats
1/fs
LEFT CHANNEL LRCIN
RIGHT CHANNEL
BCKIN
DIN AUDIO DATA WORD = 18-BIT
1 MSB
2
3
16 17 18 LSB
1
2
3
16 17 18 LSB
MSB
Figure 1 `Normal' Data Input Timing
1/fs
LEFT CHANNEL LRCIN
RIGHT CHANNEL
BCKIN
DIN
1
2
3
16 17 18 LSB
1 MSB
2
3
16 17 18 LSB
MSB AUDIO DATA WORD = 18-BIT
Figure 2 I2S Data Input Timing
WOLFSON MICROELECTRONICS LTD
PP Rev 1.3 July 2000
7
WM8733
1/fs
Product Preview
LEFT CHANNEL LRCIN
RIGHT CHANNEL
BCKIN
DIN AUDIO DATA WORD = 16-BIT
15 16 1
2
3
14 15 16 1
2
3
14 15 16 1 LSB
MSB
LSB MSB
Figure 3 16-bit Normal Packed Mode
1/fs
LEFT CHANNEL LRCIN
RIGHT CHANNEL
BCKIN
DIN AUDIO DATA WORD = 18-BIT
17 18 1
2
3
16 17 18 1
2
3
16 17 18 1 LSB
MSB
LSB MSB
Figure 4 18-bit Normal Packed Mode
MODE SELECT PINS
The WM8733 has four possible modes. SEL0 0 0 1 1 Table 4 Mode Select Pins The SEL0/1 pins (pins 4 and 11) can be hard wired, or left floating as internal "pull-downs" will cause the device to operate in normal stereo mode. SEL1 0 1 0 1 MODE Normal stereo operation Power down Left only differential output Right only differential output
WOLFSON MICROELECTRONICS LTD
PP Rev 1.3 July 2000
8
Product Preview
WM8733
The system clock is used to operate the digital filters and the noise shaping circuits. The system clock input is at pin 14 (SCKI). The frequency of WM8733's system clock should be set to 256fs or 384fs or 512fs, (where fs is the audio sampling frequency). The sample rate is typically: 32 kHz, 44.1 kHz, 48 kHz or 96kHz. WM8733 has a system clock detection circuit that automatically determines whether the system clock being supplied is at 256fs or 384fs or 512fs. The system clock should be synchronised with LRCIN, but WM8733 is tolerant of phase differences. Severe distortion in the phase difference between LRCIN and the system clock will be detected, and cause the device to automatically resynchronise. During resynchronisation, the output of the device will either repeat the previous sample, or drop the next sample, depending on the nature of the phase slip. This will ensure minimal "click" at the analog outputs during resynchronisation.
tSCKIH
SYSTEM CLOCK
SCKI
tSCKIL
Figure 5 System Clock Timing Requirements SAMPLING RATE (LRCIN) 32 kHz 44.1 kHz 48 kHz 96kHz SYSTEM CLOCK FREQUENCY (MHz) 256fs 8.192 11.2896 12.288 24.576 384fs 12.288 16.9340 18.432 36.864 512fs 16.384 22.5792 24.576 49.152
Table 5 System Clock Frequencies Versus Sampling Rate
LRCIN tBCH BCKIN tBCY tBCL tLB
tBL
DIN tDS tDH
Figure 6 Audio Data Input Timing
WOLFSON MICROELECTRONICS LTD
PP Rev 1.3 July 2000
9
WM8733 RECOMMENDED EXTERNAL COMPONENTS
1 FROM AUDIO PROCESSOR SCKI 14
Product Preview
LRCIN DIN
256fs/384fs/512fs CLK
2
FORMAT 13
3
BCKIN
DEEMPH
12
4 10F ANALOGUE OUTPUT FOR RIGHT CHANNEL
SEL0
WM8733
SEL1
11 (diode allows automute operation)
+
5
CAP
MUTE
10 External LPF ANALOGUE OUTPUT FOR LEFT CHANNEL
External LPF
6
VOUTR
VOUTL
9
7
GND
VDD
8
GND
10F
0.1F
VDD
Figure 5 Applications Diagram
DETAIL OF APPLICATION DIAGRAM SHOWING THE EXTERNAL LOW POWER FILTER
External LPF
x2 for Stereo Operation
1500pF + 10k Vin 10k 680pF
+
10k 100pF
Filtered Analogue Output
Figure 6 Third-Order Low Pass Filter (LPF) Example An external low pass filter is recommended if the device is driving a wide band amplifier, as shown in Figure 6. In some applications, second-order or passive RC filter may be adequate.
WOLFSON MICROELECTRONICS LTD
PP Rev 1.3 July 2000
10
Product Preview
WM8733
PACKAGE DIMENSIONS
D: 14 PIN SOIC 3.9mm Wide Body DM001.C
e
B
14
8
H E
1
7
D
L h x 45o
A1 -CA
SEATING PLANE
C
0.10 (0.004)
Symbols A A1 B C D E e H h L REF:
Dimensions (MM) MIN MAX 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 8.55 8.75 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.27 o o 8 0 JEDEC.95, MS-012
Dimensions (Inches) MIN MAX 0.0532 0.0688 0.0040 0.0098 0.0130 0.0200 0.0075 0.0098 0.3367 0.3444 0.1497 0.1574 0.05 BSC 0.2284 0.2440 0.0099 0.0196 0.0160 0.0500 o o 0 8
NOTES: A. ALL LINEAR DIMENSIONS ARE IN MILLIMETERS (INCHES). B. THIS DRAWING IS SUBJECT TO CHANGE WITHOUT NOTICE. C. BODY DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSION, NOT TO EXCEED 0.25MM (0.010IN). D. MEETS JEDEC.95 MS-012, VARIATION = AB. REFER TO THIS SPECIFICATION FOR FURTHER DETAILS.
WOLFSON MICROELECTRONICS LTD
PP Rev 1.3 July 2000
11


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